1. Field of the Invention
The present invention relates to bus interface logic relating to data transmission and receipt, and more particularly to a bus interface logic integrated circuit for integrating the bus interface logic using a single programmed chip.
2. Description of the Prior Art
Most of conventional data transmitting and receiving systems have a difficulty achieving a compact design because they are realized using transistor-transistor logic. For example, U.S. Pat. No. 5,218,684 discloses a memory configuration system employing a plurality of chips. Since this system employs 30 to 40 chips, a difference in characteristic among the chips is large. As a result, the system is totally subjected to an adverse affect. Since the chips are simultaneously activated, the system also has problems of noise and distortion phenomenon due to an increased signal transfer length.